ORGANIZATION OF CONCURRENT ERROR-DETECTION SYSTEMS OF COMBINATIONAL LOGICAL CIRCUITS ON THE BASIS OF BOOLEAN COMPLEMENT METHOD WITH «ONE-OUT-OF-fiVE» CONSTANT-WEIGHT CODE
Abstract and keywords
Abstract (English):
In the process of building diagnostics systems of logical units, the issue of providing full self-checking ability is particularly sensitive. In the structures of functional control, built by means of Boolean component method, the issue in question is solved fairly easily, as one and the same code may have different realizations. Also in the process of choosing the method of output realization and sequence, as well as the method of clustering outputs, one can influence both the finite structure’s complexity and its detectivity. In the process of Boolean complement method application it is convenient to use different constant-weight codes, as, in order to provide complete self-checking ability of a tester, it is sufficient to provide the appearance of all constant-weight code combinations, when using such codes. There are studies dealing with the investigation of different variants of building «1-out-of-3» and «1-out-of-4» constant-weight codes. One of the variants of building a «1-out-of-5» constant-weight code, as well as the influence of output sequence alteration on the finite structure’s com- plexity and its detectivity, was analyzed in the given article. The introduced vari- ant of a «1-out-of-5» constant-weight code was developed in such a way as to provide full self-checking ability of both the tester and «modulo two addition» elements in the structures built by this code. The experiments were conducted on a number of benchmarks, having five outputs. Structures’ characteristics with all possible output sequences were analyzed in the experiment. It was shown that the sequence of outputs markedly affects both the finite structure’s complexity and its self-checking ability.

Keywords:
diagnostics system, Boolean complement, constant-weight codes, «1-out-of-5» code, on-line diagnosis, diagnostics system’s area
Text
Publication text (PDF): Read Download
References

1. Matrosova A.Yu. Self-checking synchronous sequential circuit design for unidirectional error / A.Yu. Matrosova, S. A. Ostanin // Proceedings of the IEEE European test workshop (ETW’98), 27-29 May 1998, Sitges, Barcelona, Spain.

2. Sogomonyan E. S. Samoproveryaemye ustroystva i otkazoustoychivye sistemy / E. S. Sogomonyan, E. V. Slabakov. - M. : Radio i svyaz', 1989. - 208 s.

3. Sapozhnikov Val. V. Samoproveryaemye diskretnye ustroystva / Val. V. Sapozhnikov, Vl. V. Sapozhnikov. - SPb. : Energoatomizdat, 1992. - 224 s.

4. Parhomenko P. P. Osnovy tehnicheskoy diagnostiki (optimizaciya algoritmov diagnostirovaniya, apparaturnye sredstva) / P. P. Parhomenko, E. S. Sogomonyan. - M. : Energoatomizdat, 1981. - 320 s.

5. Matrosova A. A Fault-tolerant sequential circuit design for SAFs and PDFs soft errors / A. Matrosova, S. Ostanin, I. Kirienko, E. Nikolaeva // 2016 IEEE 22nd International symposium on on-line testing and robust system design (IOLTS), 4-6 July 2016. - Rp. 1-2.

6. Busaba F. Y. Self-checking combinational circuit design for single and unidirectional multibit errors / F. Y. Busaba, P. K. Lala // Journal of electronic testing : Theory and applications. - 1994. - Vol. 5. - Issue 5. - Pp. 19-28.

7. Das D. Synthesis of circuits with low-cost concurrent error detection based on Bose-Lin codes / D. Das, N.A. Touba // Journal of electronic testing : Theory and applications. - 1999. - Vol. 15. - Issue 1-2. - Pp. 145-155.

8. Das D. Low cost concurrent error detection based on modulo weight-based codes / D. Das, N.A. Touba, M. Seuring, M. Gossel // Proceedings of the 6th IEEE International on-line testing workshop (IOLTW), Spain, Palma de Mallorca, July 3-5, 2000. - Pp. 171-176.

9. Nicolaidis M. On-line testing for VLSI - A Compendium of approaches / M. Nicolaidis, Y. Zorian // Journal of electronic testing : Theory and application. - 1998. - Vol. 12. - Issue 1-2. - Pp. 7-20.

10. Mitra S. Which concurrent error detection scheme to shoose? / S. Mitra, E. J. McCluskey // Proceedings of International test conference, 2000, USA, Atlantic City, NJ, 3-5 October 2000. - Pp. 985-994.

11. Mehov V. B. Kontrol' kombinacionnyh shem na osnove modificirovannyh kodov s summirovaniem / V. B. Mehov, Val. V. Sapozhnikov, Vl. V. Sapozhnikov // Avtomatika i telemehanika. - 2008. - № 8. - S. 153-165.

12. Pivovarov D. V. Osobennosti organizacii polnost'yu samoproveryaemyh struktur na osnove ravnovesnogo koda «1 iz 4» / D. V. Pivovarov // Materialy yubileynoy XV Sankt-Peterburgskoy Mezhdunarodnoy konferencii «Regional'naya informatika - 2016», Sankt-Peterburg, 26-28 oktyabrya 2016 g. - SPb. : SPOISU, 2016. - S. 307-308.

13. Sapozhnikov Val. V. Metod logicheskogo dopolneniya na osnove ravnovesnogo koda «1 iz 4» dlya postroeniya polnost'yu samoproveryaemyh struktur sistem funkcional'nogo kontrolya / Val. V. Sapozhnikov, Vl. V. Sapozhnikov, D. V. Efanov, D. V. Pivovarov // Elektronnoe modelirovanie. - 2017. - T. 39. - № 2. - S. 15-34.

14. Efanov D. V. O svoystvah koda s summirovaniem v shemah funkcional'nogo kontrolya / D. V. Efanov, Val. V. Sapozhnikov, Vl. V. Sapozhnikov // Avtomatika i telemehanika. - 2010. - № 6. - S. 155-162.

15. Sapozhnikov Val. V. Samodvoystvennye diskretnye ustroystva / Val. V. Sapozhnikov, Vl. V. Sapozhnikov, M. Gessel'. - SPb. : Energoatomizdat, Sankt-Peterburgskoe otd-nie, 2001. - 331 s.

16. Saposhnikov Val. V. Concurrent checking by Use of complementary circuits for «1-out-of-3» Codes / Val. V. Saposhnikov, A. Morozov, Vl. V. Saposhnikov, M. Goes- sel // 5th International workshop IEEE DDECS 2002, Brno, Czech Republic, April 17-19, 2002.

17. Gessel' M. Logicheskoe dopolnenie - novyy metod kontrolya kombinacionnyh shem / M. Gessel', A. V. Morozov, Val. V. Sapozhnikov, Vl. V. Sapozhnikov // Avtomatika i telemehanika. - 2003. - № 1. - S. 167-176.

18. Sapozhnikov Val. V. O sinteze polnost'yu samoproveryaemyh kombinacionnyh shem / Val. V. Sapozhnikov, Vl. V. Sapozhnikov // Izvestiya Peterburgskogo universiteta putey soobscheniya. - 2006. - № 1. - S. 97-110.

19. Das D. K. Constraint don’t cares for optimizing designs for concurrent checking by 1-out-of-3 Codes / D. K. Das, S. S. Roy, A. Dmitiriev, A. Morozov, M. Gössel // Proceedings of the 10th International workshops on boolean problems, Freiberg, Germany, September, 2012. - Rp. 33-40.

20. Efanov D. Methods of organization of totally self-checking concurrent error de- tection system on the basis of constant-weight «1-out-of-3»-Code / D. Efanov, Val. Sapozhnikov, Vl. Sapozhnikov // Proceedings of 14th IEEE East-West design & Test symposium (EWDTS`2016), Yerevan, Armenia, October 14-17, 2016. - Pp. 117-125.

21. Sapozhnikov Val. V. Postroenie polnost'yu samoproveryaemyh struktur sistem funkcional'nogo kontrolya s ispol'zovaniem ravnovesnogo koda «1 iz 3» / Val. V. Sapozhnikov, Vl. V. Sapozhnikov, D. V. Efanov // Elektronnoe modeli- rovanie. - 2016. - T. 38. - № 6. - S. 25-43.

22. Sapozhnikov Val. V. Organizaciya funkcional'nogo kontrolya kombinacionnyh shem metodom logicheskogo dopolneniya / Val. V. Sapozhnikov, Vl. V. Sapozhnikov, A. V. Dmitriev, A. V. Morozov, M. Gessel' // Elektronnoe modelirovanie. - 2002. - T. 24. - № 6. - S. 51-66.

23. Sapozhnikov Val. V. Kontrol' kombinacionnyh shem metodom logicheskogo dopolneniya / Val. V. Sapozhnikov, Vl. V. Sapozhnikov, G. V. Osadchiy // Konstruirovanie, sertifikaciya i tehnicheskaya ekspluataciya ustroystv i sistem zheleznodorozhnoy avtomatiki i telemehaniki : sb. nauch. tr. - SPb. : Peterbursgkiy gos. un-t putey soobscheniya, 2003. - S. 3-8.

24. Osadchiy G. V. Razrabotka metoda logicheskogo dopolneniya dlya diagnostirovaniya i monitoringa ustroystv zheleznodorozhnoy avtomatiki / G. V. Osadchiy // Izvestiya Peterburgskogo universiteta putey soobscheniya. - 2004. - № 1. - S. 84-89.

25. Osadchiy G. V. Povyshenie effektivnosti ispol'zovaniya metoda logicheskogo dopolneniya dlya kontrolya kombinacionnyh shem / G. V. Osadchiy // Razrabotka i ekspluataciya novyh ustroystv i sistem zheleznodorozhnoy avtomatiki i telemehaniki : sb. nauch. tr. - SPb. : Peterbursgkiy gos. un-t putey soobscheniya, 2004. - S. 32-35.

26. Saposhnikov Val. V. Design of totally self-checking combinational circuits by Use of complementary circuits / Val. V. Saposhnikov, Vl. V. Saposhnikov, A. Morozov, G. Osadtchi, M. Gossel // Proceedings of East-West design & Test workshop, Yalta, Ukraine, 2004. - Pp. 83-87.

27. Gessel' M. Kontrol' kombinacionnyh shem metodom logicheskogo dopolneniya / M. Gessel', A. V. Morozov, Val. V. Sapozhnikov, Vl. V. Sapozhnikov // Avtomatika i telemehanika. - 2005. - № 8. - S. 161-172.

28. Göessel M. New methods of concurrent checking : Edition 1 / M. Göessel, V. Ochere- tny, E. Sogomonyan, D. Marienfeld. - Dordrecht : Springer science+business media B. V., 2008. - 184 p.

29. Sen S. K. A Self-checking circuit for concurrent checking by 1-out-of-4 code with design optimization using constraint don’t cares / S. K. Sen // National conference on emerging trends and advances in electrical engineering and renewable energy (NCEEERE’2010), Sikkim manipal institute of technology, Sikkim, held during, 22-24 December, 2010.

30. Pivovarov D. V. Odin sposob postroeniya polnost'yu samoproveryaemyh struktur sistem funkcional'nogo kontrolya na osnove ravnovesnogo koda «1 iz 4» / D. V. Pivovarov // Informacionnye tehnologii na transporte : sb. materialov sekcii «Informacionnye tehnologii na transporte» yubileynoy XV Sankt-Peterburgskoy Mezhdunarodnoy konferencii «Regional'naya informatika - 2016», Sankt-Peterburg, 26-28 oktyabrya 2016 g. ; pod. red. Val. V. Sapozhnikova. - SPb. : FGBOU VO PGUPS, 2016. - S. 17-27.

31. Efanov D. V. Primenenie ravnovesnogo koda «2 iz 4» pri organizacii sistem funkcional'nogo kontrolya / D. V. Efanov // Izvestiya Peterburgskogo universiteta putey soobscheniya. - 2016. - № 2. - S. 269-278.

32. Sapozhnikov Val. V. Metod funkcional'nogo kontrolya kombinacionnyh logicheskih ustroystv na osnove koda «2 iz 4» / Val. V. Sapozhnikov, Vl. V. Sapozhnikov, D. V. Efanov // Izvestiya vuzov. Priborostroenie. - 2016. - T. 59. - № 7. - S. 524-533.

33. Sapozhnikov Val. Concurrent error detection of combinational circuits by the me- thod of boolean complement on the base of «2-out-of-4» code / Val. Sapozhnikov, Vl. Sapozhnikov, D. Efanov // Proceedings of 14th IEEE East-West design & Test symposium (EWDTSʼ2016), Yerevan, Armenia, October 14-17, 2016. - Pp. 126-133.

34. Sapozhnikov Val. V. Postroenie samoproveryaemyh struktur sistem funkcional'nogo kontrolya na osnove ravnovesnogo koda «2 iz 4» / Val. V. Sapozhnikov, Vl. V. Sapozhnikov, D. V. Efanov // Problemy upravleniya. - 2017. - № 1. - S. 57-64.

35. Sapozhnikov Val. V. Organizaciya sistem funkcional'nogo kontrolya s obespecheniem polnoy samoproveryaemosti struktury na osnove moduley szhatiya parafaznyh signalov / Val. V. Sapozhnikov, Vl. V. Sapozhnikov, D. V. Efanov // Iz- vestiya vuzov. Priborostroenie. - 2017. - T. 60. - № 5. - S. 404-411.

36. Aksenova G. P. Neobhodimye i dostatochnye usloviya postroeniya polnost'yu proveryaemyh shem svertki po modulyu dva / G. P. Aksenova // Avtomatika i telemehanika. - 1979. - № 9. - S. 126-135.

37. Collection of digital design benchmarks. - URL : http://ddd.fit.cvut.cz/prj/ Benchmarks.

38. Yang S. Logic synthesis and optimization benchmarks : User Guide : Version 3.0 / S. Yang. - Microelectronics center of Nth Carolina (MCNC), 1991. - 88 p.

39. SIS : A system for sequential circuit synthesis / E. M. Sentovich, K. J. Singh, L. Lavagno, C. Moon, R. Murgai, A. Saldanha, H. Savoj, P. R. Stephan, R. K. Brayton, A. Sangiovanni-Vincentelli // Electronics research laboratory, Department of electrical engineering and computer science, University of California, Berkeley, 4 May 1992. - 45 p.

40. Sapozhnikov Val. V. Sposob postroeniya sistemy funkcional'nogo kontrolya na osnove logicheskogo dopolneniya po ravnovesnomu kodu «1 iz 5» / Val. V. Sapozhnikov, Vl. V. Sapozhnikov, D. V. Efanov, D. V. Pivovarov // Radioelektronika i informatika. - 2017. - № 3. - S. 28-35.

Login or Create
* Forgot password?