APPLICATION OF WEIGHT-BASED SUM CODES AT THE SYNTHESIS OF CIRCUITS FOR BUILT-IN CONTROL BY BOOLEAN COMPLEMENT METHOD
Abstract and keywords
Abstract (English):
This work considers the application of Boolean complement method for the organization of self-checking circuits of built-in control for the devices synthesized on being Field-Programmable Gate Arrays. Review is given for the application of Boolean complement method while using various noise-resistant codes. The example is demonstrated for control circuit synthesis with Boolean complement method. Algorithm for control system synthesis by Boolean complement method with the use of weight-based sum codes by module M is formulated. As an example, weighted codes are considered with the summation of weight categories by module M = 3 and M = 4 for these purposes. The given codes have only two control categories that simplifies their application for task solution on the design of functional diagnostics system by Boolean complement method. The comparative analysis of both codes with their use in the systems with Boolean complement has been pursued. The application of Boolean complement method on the basis of weight-based sum codes for synthesis of discrete devices has been suggested.

Keywords:
Field-Programmable Gate Arrays, self-checking discrete device, selfchecking circuit of in-built control, duplication method, Boolean complement, weight-based sum code
Text
Text (PDF): Read Download
References

1. Sapozhnikov V.V., Sapozhnikov Vl.V., Hristov H.A., Gavzov D.V. Metody postroeniya bezopasnyh mikroelektronnyh sistem zheleznodorozhnoy avtomatiki. - Pod red. Vl.V. Sapozhnikova. - M.: Transport, 1995, 272 s.

2. Parhomenko P.P., Sogomonyan E.S. Osnovy tehnicheskoy diagnostiki (optimizaciya algoritmov diagnostirovaniya, apparaturnye sredstva). - M.: Energoatomizdat, 1981, 320 s.

3. Sogomonyan E.S., Slabakov E.V. Samoproveryaemye ustroystva i otkazoustoychivye sistemy. - M.: Radio i svyaz', 1989, 208 s.

4. Goessel M., Graf S. Error Detection Circuits. - London: McGraw-Hill, 1994, 261 p.

5. Nicolaidis M., Zorian Y. On-Line Testing for VLSI - A Compendium of Approaches // Journal of Electronic Testing: Theory and Applications. - 1998. - №12. - Pp. 7-20.

6. Piestrak S.J. Design of Self-Testing Checkers for Unidirectional Error Detecting Codes. - Wrocław: Oficyna Wydawnicza Politechniki Wrocłavskiej, 1995, 111 p.

7. Efanov D., Sapozhnikov V., Sapozhnikov Vl. Generalized Algorithm of Building Summation Codes for the Tasks of Technical Diagnostics of Discrete Systems // Proceedings of 15th IEEE East-West Design & Test Symposium (EWDTS`2017), Novi Sad, Serbia, September 29 - October 2, 2017, pp. 365-371, doi:https://doi.org/10.1109/EWDTS.2017.8110126.

8. Busaba F.Y., Lala P.K. Self-Checking Combinational Circuit Design for Single and Uni-directional Multibit Errors // Journal of Electronic Testing: Theory and Applications. - 1994. - Issue 1. - Pp. 19-28. - DOI:https://doi.org/10.1007/BF00971960.

9. Morosow A, Saposhnikov V.V., Saposhnikov Vl.V., Goessel M. Self-Checking Combina-tional Circuits with Unidirectionally Independent Outputs // VLSI Design. - 1998. - Vol. 5. - Issue 4. - Pp. 333-345. - DOI:https://doi.org/10.1155/1998/20389.

10. Gessel' M., Morozov A.V., Sapozhnikov V.V., Sapozhnikov Vl.V. Logicheskoe dopolnenie - novyy metod kontrolya kombinacionnyh shem // Avtomatika i telemehanika. - 2003. - №1. - S. 167-176.

11. Saposhnikov Vl.V., Dmitriev A., Goessel M., Saposhnikov V.V. Self-Dual Parity Checking - a New Method for on Line Testing // Proceedings of 14th IEEE VLSI Test Symposium, USA, Princeton, 1996, pp. 162-168.

12. Göessel M., Ocheretny V., Sogomonyan E., Marienfeld D. New Methods of Concurrent Checking: Edition 1. - Dordrecht: Springer Science+Business Media B.V., 2008, 184 p.

13. Efanov D., Sapozhnikov V., Sapozhnikov Vl., Osadchy G., Pivovarov D. Self-Dual Complement Method up to Constant-Weight Codes for Arrangement of Combinational Logical Circuits Concurrent Error-Detection Systems // Proceedings of 17th IEEE East-West Design & Test Symposium (EWDTS`2019), Batumi, Georgia, September 13-16, 2019, pp. 136-143, doi:https://doi.org/10.1109/EWDTS.2019.8884398.

14. Efanov D.V., Sapozhnikov V.V., Sapozhnikov Vl.V., Pivovarov D.V. The Synthesis Conditions of Completely Self-Testing Embedded-Control Circuits Based on the Boolean Complement Method to the «1-out-of-m» Constant-Weight Code // Automatic Control and Computer Sciences. - 2020. - Vol. 54. - Issue 2. - Pp. 89-99. - DOI:https://doi.org/10.3103/S0146411620020042.

15. Das D.K., Roy S.S., Dmitiriev A., Morozov A., Gössel M. Constraint Don’t Cares for Optimizing Designs for Concurrent Checking by 1-out-of-3 Codes // Proceedings of the 10th International Workshops on Boolean Problems, Freiberg, Germany, September, 2012, pp. 33-40.

16. Sapozhnikov V.V., Sapozhnikov Vl.V., Dmitriev A.V., Morozov A.V., Gessel' M. Organizaciya funkcional'nogo kontrolya kombinacionnyh shem metodom logicheskogo dopolneniya // Elektronnoe modelirovanie. - 2002. - Tom 24. - №6. - S. 52-66.

17. Morozov A., Saposhnikov V.V., Saposhnikov Vl. V., Goessel M. New Self-checking Circuits by Use of Berger-codes // 6-th IEEE Int. On-line Testing Workshop. Palma de Mallorca, Spain. 2000 pp. 141-146.

18. Sapozhnikov V.V., Sapozhnikov Vl.V., Efanov D.V. Postroenie samoproveryaemyh struktur sistem funkcional'nogo kontrolya na osnove ravnovesnogo koda «2 iz 4» // Problemy upravleniya. - 2017. - №1. - S. 57-64.

19. Efanov D., Osadchy G., Zueva M. Special Aspects of Errors Definition via Sum Codes within Embedded Control Schemas Being Realized by Means of Boolean Complement Method // Proceedings of 11th IEEE International Conference on Intelligent Data Acquisition and Advanced Computing Systems: Technology and Applications (IDAACS’2021), Vol. 1, Cracow, Poland, September 22-25, 2021, pp. 424-431

20. Efanov D.V., Sapozhnikov V.V., Sapozhnikov Vl.V. The Self-Checking Concurrent Error-Detection Systems Synthesis Based on the Boolean Complement to the Bose-Lin Codes with the Modulo Value M=4 // Electronic Modeling. - 2021. - Vol. 43. - Issue 1. - Pp. 28-45. - DOI:https://doi.org/10.15407/emodel.43.01.028.

21. Efanov D.V., Osadchiy G.V., Zueva M.V. Kody Bergera v shemah vstroennogo kontrolya, realizovannyh na osnove metoda logicheskogo dopolneniya // Informatika i sistemy upravleniya. - 2021. - №1. - S. 75-89. - DOI:https://doi.org/10.22250/isu.2021.67.75-89.

22. Efanov D.V., Zueva M.V. Logicheskoe dopolnenie do modul'nyh kodov s summirovaniem dlya sinteza shem vstroennogo kontrolya kombinacionnyh ustroystv avtomatiki i vychislitel'noy tehniki // Problemy razrabotki perspektivnyh mikro- i nanoelektronnyh sistem (MES). - 2021. - №1. - S. 52-60. - DOI:https://doi.org/10.31114/2078-7707-2021-1-52-60.

23. Efanov D.V., Osadchiy G.V., Zueva M.V. Osobennosti obnaruzheniya oshibok kodami s summirovaniem edinichnyh informacionnyh razryadov v kol'ce vychetov po zadannomu modulyu v shemah vstroennogo kontrolya, sintezirovannyh na osnove metoda logicheskogo dopolneniya // Avtomatika na transporte. - 2021. - Tom 7. - №2. - S. 284-314. - DOI:https://doi.org/10.20295/2412-9186-2021-7-2-284-314.

24. Efanov D., Osadchy G., Zueva M. Specifics of Error Detection with Modular Sum Codes in Concurrent Error-Detection Circuits Based on Boolean Complement Method // Proceedings of 19th IEEE East-West Design & Test Symposium (EWDTS’2021), Batumi, Georgia, September 10-13, 2021, pp. 59-69, doi:https://doi.org/10.1109/EWDTS52692.2021.9581036.

25. Sapozhnikov V.V., Sapozhnikov Vl.V., Efanov D.V. Vzveshennye kody s summirovaniem dlya organizacii kontrolya logicheskih ustroystv // Elektronnoe modelirovanie. - 2014. - Tom 36. - №1. - S. 59-80.

26. Efanov D.V., Sapozhnikov V.V., Sapozhnikov Vl.V. Using Codes with Summation of Weighted Bits to Organize Checking of Combinational Logical Devices // Automatic Control and Computer Sciences. - 2019. - Vol. 53. - Issue 1. - Pp. 1-11. - DOI:https://doi.org/10.3103/S0146411619010061.

27. Berger J.M. A Note on Error Detection Codes for Asymmetric Channels // Information and Control. - 1961. - Vol. 4. - Issue 1. - Pp. 68-73. - DOI:https://doi.org/10.1016/S0019-9958(61)80037-5.

28. Berger J.M. A Note on Burst Detection Sum Codes // Information and Control. - 1961. - Vol. 4. - Issue 2-3. - Pp. 297-299. - DOI:https://doi.org/10.1016/S0019-9958(61)80024-7.

29. Das D., Touba N.A. Weight-Based Codes and Their Application to Concurrent Error Detection of Multilevel Circuits // Proceedings of 17th IEEE Test Symposium, California, USA, 1999, pp. 370-376, doi:https://doi.org/10.1109/VTEST.1999.766691.

30. Das D., Touba N.A., Seuring M., Gossel M. Low Cost Concurrent Error Detection Based on Modulo Weight-Based Codes // Proceedings of the IEEE 6th International On-Line Testing Workshop (IOLTW), Spain, Palma de Mallorca, July 3-5, 2000, pp. 171-176, doi:https://doi.org/10.1109/OLT.2000.856633

31. Abdullaev R.B. Svoystva polinomial'nyh kodov v sistemah funkcional'nogo kontrolya kombinacionnyh logicheskih shem // Avtomatika na transporte. - 2018. - Tom 4. - №4. - S. 655-686.

32. Abdullaev R.B. Veroyatnostnye harakteristiki polinomial'nyh kodov v si-stemah tehnicheskogo diagnostirovaniya // Avtomatika na transporte. - 2020. - Tom 6. - №1. - S. 64-88. - DOI:https://doi.org/10.20295/2412-9186-2020-6-1-64-88.

33. Abdullaev R.B. Polinomial'nye kody s obnaruzheniem lyubyh simmetrichnyh i asimmetrichnyh oshibok v informacionnyh vektorah // Nauka i tehnika transporta. - 2020. - №1. - S. 80-92.

34. Abdullaev R.B. Sintez polnost'yu samoproveryaemyh shem vstroennogo kontrolya na osnove polinomial'nyh kodov dlya kombinacionnyh logicheskih ustroystv // Avtomatika na transporte. - 2021. - Tom 7. - №3. - S. 452-476. - DOI:https://doi.org/10.20295/2412-9186-2021-7-3-452-476.

35. Sapozhnikov V.V., Sapozhnikov Vl.V., Efanov D.V. Kody Hemminga v sistemah funkcional'nogo kontrolya logicheskih ustroystv. - SPb.: Nauka, 2018, 151 s.

36. Tshagharyan G., Harutyunyan G., Shoukourian S., Zorian Y. Experimental Study on Hamming and Hsiao Codes in the Context of Embedded Applications // Proceedings of 15th IEEE East-West Design & Test Symposium (EWDTS’2017), Novi Sad, Serbia, September 29 - October 2, 2017, pp. 25-28, doi:https://doi.org/10.1109/EWDTS.2017.8110065.

37. Sapozhnikov V.V., Sapozhnikov Vl.V., Efanov D.V. Kody s summirovaniem dlya sistem tehnicheskogo diagnostirovaniya. Tom 2: Vzveshennye kody s summirovaniem. - M.: Nauka, 2021, 455 s.

38. Sapozhnikov V.V., Sapozhnikov Vl.V., Efanov D.V. Teoriya sinteza samoproveryaemyh cifrovyh sistem na osnove kodov s summirovaniem. - Sankt-Peterburg: «Lan'», 2021, 580 s.

39. Berger J.M. A Note on Error Detection Codes for Asymmetric Channels // Information and Control. - 1961. - Vol. 4. - Issue 1. - Pp. 68-73. - DOI:https://doi.org/10.1016/S0019-9958(61)80037-5.

40. Mehov V.B., Sapozhnikov V.V., Sapozhnikov Vl.V. Kontrol' kombinacionnyh shem na osnove modificirovannyh kodov s summirovaniem // Avtomatika i telemehanika. - 2008. - №8. - S. 153-165.

41. Efanov D.V., Pashukov A.V. The Weight-Based Sum Codes in the Residue Ring by Arbitrary Modulus for Synthesis of Self-Checking Digital Computing Systems // Proceedings of 19th IEEE East-West Design & Test Symposium (EWDTS’2021), Batumi, Georgia, September 10-13, 2021, pp. 170-179, doi:https://doi.org/10.1109/EWDTS52692.2021.9581032.

42. Pashukov A.V. Issledovanie osobennostey obnaruzheniya oshibok na vyhodah programmiruemyh logicheskih integral'nyh shem pri funkcional'nom kontrole na osnove modul'nyh kodov s summirovaniem // Avtomatika na transporte - 2021. T. 7 №3. S. 477-495.

43. Pivovarov D.V. Metod logicheskogo dopolneniya dlya organizacii kontrolya kombinacionnyh ustroystv v sistemah monitoringa ob'ektov zheleznodorozhnoy avtomatiki dis. kand. tehn. nauk: 05.13.06.: zaschischena 19.11.20: utv. 04.06.21: / Pivovarov Dmitriy Vya-cheslavovich; [Mesto zaschity: Peterb. gos. un-t putey soobsch.]. - SPb, 2020. - 167 s.

Login or Create
* Forgot password?