Category: Design and test of logical devices

Authors:

Pivovarov D. V.

Annotation:
The article describes the process of synthesis of asynchronous JK flip-flops with different characteristics by using the finite automata theory. It reveals the disadvantage of a conventional implementations of asynchronous JK flip-flop, and then describes the synthesis of JK flip-flop without this disadvantage. The article presents four implementations of JK flip-flop as a fundamental circuit using Multisim software. During the implementation of the flip-flops in Multisim software few design features were considered, that are necessary for the correct operation of flip-flops. The article describes the operation of each option of JK flipflops in the form of timing sheets. The timing sheets show the disadvantages of JK flip-flop conventional implementations and the lack thereof in the synthesized flipflops. The operation of 74LS107D flip-flop is simulated using Multisim software. The article also shows that the actual fl ip-fl op circuits do not have the described disadvantages.

Key words:
finite automaton; flip-flop; JK flip-fl op; flip-flop synthesis; Multisim


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